1. Field of the Invention
The present invention relates generally to electrical devices and systems, and particularly to RF attenuators, devices and systems.
2. Technical Background
An RF attenuator is a device that is configured to reduce the level of an RF signal. Attenuation is typically measured as a ratio of the output power level over the input power level, and is thus given in decibels (dB). Because the power of the output signal is lower than the power of the input signal, the attenuation level is negative (e.g., −20 dB). As those of ordinary skill in the art will appreciate, attenuation is often required to protect a component or a circuit stage, e.g., monitoring or sampling circuitry, when an RF signal exceeds the power handling capabilities of the protected circuit. Thus, in many cases, the accuracy of the attenuator is important, because of the tolerances of the various stages of the overall RF design.
RF attenuators reduce the RF signal level by dissipating (I2R losses) excess power. As those of ordinary skill in the art will appreciate, power dissipation by I2R losses refers to a process whereby the RF energy is converted into thermal energy. When the RF signal is relatively small, for example, the heat generated by this process may not be an issue. On the other hand, when the RF signal power is relatively high, the RF attenuator must be configured so that the thermal energy is successfully directed from the attenuator to a heat exchange device and out of the RF system. Otherwise, the system components can overheat and become damaged. Power handling capabilities for RF attenuators are typically given in Watts (W), milliwatts (mW), dBW (decibels relative to a Watt), or in dBm (decibels relative to a milliwatt).
Attenuators are typically designed for use in systems that have a certain or predetermined characteristic impedance (that is typically established by the system designer per a customer's requirements). For example, an RF attenuator may be designed for use in a system that has a 50 Ohm (Ω) or a 75Ω characteristic impedance. Obviously, RF attenuators may be designed to operate in RF systems that are characterized by other impedance values. In any event, RF attenuators may be employed in such systems for impedance matching functions (in addition to the attenuation function). Those of ordinary skill in the art will also appreciate that the level of attenuation provided by an RF attenuator may vary as a function of frequency. The reason for the frequency dependence may relate to the use or existence of reactive components (e.g., inductors, capacitors) as well as a frequency dependence exhibited by the resistors employed in the RF attenuator.
In general, an RF attenuator is a type of RF component that may be used in a wide variety of applications wherein an RF input signal must be reduced to a required signal level. As noted above, an RF attenuator may be used for other applications such as impedance matching (in addition to attenuation).
Referring to FIG. 1, a schematic diagram of a conventional π-attenuator is shown. A π-attenuator is so named because it is formed in the shape of the Greek letter “π”; thus, it has one series resistor (R2) and two parallel resistors (R1, R3) shunted to ground. Specifically, resistor R1 is disposed at the input and resistor R3 is disposed the output, with resistor R2 disposed therebetween. The π-attenuator depicted in FIG. 1 implements a 20 dB attenuator that is characterized by a 50 Ohm port impedance. The parallel resistors R1 and R3 are equal to 61.11Ω, and the series resistor R2 is equal to 247.5Ω. If the conventional attenuator of FIG. 1 is configured to handle relatively high power, then the resistors R1, R2, and R3 can be implemented using thick film technology. Specifically, the resistors may be implemented by depositing a resistive paste on a ceramic substrate. The paste is typically a Nichrome (NiCr) formulation. The substrate can be any suitable substrate such as Alumina, Aluminum Nitride or BeO.
(The present invention should not be construed as being limited to any particular type of attenuator such as a π-attenuator, T-attenuator, etc.).
FIG. 2 is a parasitic capacitance model of the conventional π-attenuator depicted in FIG. 1. Briefly referring to FIG. 3, a plan view of a conventional π-attenuator shown in FIG. 2 is provided. Note that each resistor is configured to have a rectangular layout of length L and width W. The sheet resistance (Rs) value for a resistor is given by the expression R=Rs*L/W. The power handling capabilities of each resistor is proportional to its area L*W. The desired resistance can be realized by a resistor different area just as long as the equality Rs*L/W is maintained. Thus, given two resistors having the same sheet resistance (Rs), the larger resistor can handle more power. On the other hand, when an attenuator device features relative large resistive film regions, the resistive sheets are characterized by large parasitic capacitances that limit the RF bandwidth. As a result, many designs include one or more auxiliary tuning components that are used to reduce or obviate the effects of the parasitic capacitance.
Referring to FIG. 2, a parasitic capacitance model of the conventional π-attenuator depicted in FIG. 1 is shown. As noted above, each resistive sheet is characterized by a parasitic capacitance that can limit the RF bandwidth. Thus, each resistor (R1, R2 and R3) has a parasitic capacitor associated with it. Moreover, the model of FIG. 2 can be used to improve high frequency performance. For example, the series resistor R2 is shown herein as being implemented by two resistors R2′ and R2″ with an inductive high impedance transmission TL disposed therebetween. Putting it all together, the model shows that a parasitic capacitance Cp1 is associated with the input shunt resistor R1, a parasitic capacitance Cp3 is associated with the output shunt resistor R3, and parasitic capacitances Cp2′ and Cp2″ are associated with series resistors R2′ and R2″, respectively. As expected, therefore, the inductive transmission line TL is configured to cancel out the effects of parasitic capacitors Cp1, Cp2′, Cp2″ and Cp3.
Referring back to FIG. 3, a plan view of a conventional π-attenuator 1 that accounts for the parasitic capacitance modeled in FIG. 2 is provided. In this example, a 30 Watt 20 dB termination is shown. The attenuator 1 is implemented on a 0.1″×0.2″×25 mil aluminum nitride substrate where the resistor films R1, R2′, R2″ and R3 are made of Nichrome film. The input port, the output port, the tuning transmission line TL and the signal paths therebetween are implemented by providing metalized layers (see oblique shaded regions). The ground portions are also implemented by metalized layers. The metalized layers may be implemented by using a silver paste material
Resistor R1 is 0.13×0.005 square inches and has a sheet resistance (Rs) of 159 Ohm/square. Resistors R2′ and R2″ are each 0.025×0.012 square inches and have a sheet resistance (Rs) of 59 Ohm/square. Resistor R3 is 0.025×0.012 square inches and has a sheet resistance (Rs) of 29 Ohm/square. As shown, the resistor R1 is disposed over a large portion of the layout area in order to efficiently direct the thermal energy (from I2R heat loss) into the ceramic substrate. Despite this, the thermal energy is not evenly distributed over the ceramic substrate; in fact, the hottest spots are in the area of resistors R2′ and R2″. Specifically, the percentage of the power dissipated by resistors R1, R2′, R2″, and R3 are P1=82%, P2′=8%, P2″=8% and P3=2%, respectively. Ideally, therefore, the portion of the overall surface area of the ceramic substrate occupied by the resistors R1, R2′, R2″, and R3 should be equal to about A1=82%, A2′=8%, A2″=8% and A3=2%, respectively, in order to evenly distribute the heat over the entire substrate and to maximize the power handling capabilities of device 10. Of course, since the attenuator 1 includes tuning circuitry such as transmission line TL, connecting lines and other layout constrains, the ideal condition cannot be perfectly satisfied. Thus, the ratio of the power dissipation percentage over the surface area for each resistor (i.e., P1/A1, P2′/A2′, P2″/A2″, P3/A3) is given by 2.5, 5.3, 5.3 and 1.3 respectively.
It is also worth noting that due to manufacturing tolerances, the resistance values are also often not in the design range. When that happens, a laser trimming process is required to modify the resistor geometry for each resistor deviation. Such laser trimming process adds time and, therefore, cost to the production process.
What is needed therefore is a different and simplified approach to manufacturing RF attenuator devices. To be specific, what is further needed is a simple attenuator circuit layout that substantially eliminates, or significantly reduces, the need to balance heat distribution between multiple resistors. While solving the heat distribution issue, an attenuator device should be configured to absorb the effects of parasitic capacitance in order to achieve a wideband return loss. What is also needed is a substantially optimized resistive patch arrangement that covers the maximum possible substrate surface area without degrading the input return loss; in other words, a device is needed that maximizes the device's power handling capabilities without sacrificing bandwidth. Finally, a device layout is needed that reduces the amount of laser trimming required to speed up the production process.